The present invention relates to a vertical power semiconductor device in which breakdown voltage enhancement is compatible with current capacity enhancement.
In general, semiconductor devices may be roughly classified into lateral devices each having electrode sections only on one side and vertical elements each having electrode sections on both sides. In a vertical device, both the direction in which a drift current flows in an on-state and the direction in which a depletion layer formed by a reverse bias voltage extends are in the direction of the thickness of a substrate (i.e. the vertical direction). For example, in an ordinary planer n-channel vertical MOSFET (metal oxide silicon field effect transistor), a high resistance n−-drift layer is operated as a region for flowing a drift current in the vertical direction when the MOSFET is in an on-state. While, when in an off-state, the n−-drift layer is depleted for an operation of enhancing a breakdown voltage.
Reduction in the thickness of the high resistance n−-drift layer, i.e. reduction in a current path length, lowers drift resistance in an on-state, which results in an effect of a reduction in substantial on-resistance (drain-source resistance) of the MOSFET. In an off-state, however, a width of a depletion layer between the n-drain and the p-base, expanding from the pn-junction between a p-base region and the n−-drift layer, is narrowed to cause an electric field strength of the depletion layer to quickly reach the maximum (critical) electric field strength of silicon. That is, breakdown is caused before the drain-source voltage reaches the design value of the breakdown voltage of the device. This results in reduction in the breakdown voltage (drain-source voltage).
Contrary to this, a thickly formed n−-drift layer can provide a high breakdown voltage. This, however, inevitably increases on-resistance to increase a power loss in the on-state. In this way, there is a tradeoff relationship between the on-resistance (current capacity) and the breakdown voltage. The relationship is also known to be similarly held in a semiconductor device with a drift layer such as an IGBT (insulated gate bipolar transistor), a bipolar transistor and a diode. A commonly known solution to this problem is to provide a semiconductor device with a drift layer provided as a alternating conductivity type layer in which n-type regions and p-type regions both with increased impurity concentrations are alternatingly joined into multi-junctions.
The structural difference between the above semiconductor device and an ordinary planar n-channel type vertical MOSFET is that the drift layer of the above semiconductor device is not made up of a uniform single conductive layer (impurity diffused layer) but made up of alternating conductivity type layer in which vertical n-type drift regions and vertical p-type partition regions are alternately joined into multi-junctions. Even though the impurity concentrations in the alternating conductivity type layer are high, in an off-state, a depletion layer expands in both lateral directions from each pn junction orientated in the vertical direction of the alternating conductivity layer to make the whole drift layer depleted. Thus a high breakdown voltage can be provided. A semiconductor device provided with a drift layer with such a alternating conductivity type layer is referred to as a super junction semiconductor device.
In the super junction semiconductor device, a device as disclosed in, for example, JP-A-2002-280555 is publicly known in which a voltage withstanding structure around the drift layer is provided as the alternating conductivity type layer. Along with this, in the device, an n-type region is disposed around the alternating conductivity type layer for separating a p-type region formed in the outermost periphery section and a p-type region in the alternating conductivity type layer as the voltage withstanding structure. This is for significantly reducing a leak current in an off-state and, along with this, for increasing reliability of breakdown voltage. Moreover, a semiconductor device as disclosed in, for example, JP-A-2002-184985 is publicly known. The device provides an electrode positioned some distance away from an end of a structure with a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type alternately arranged on a semiconductor substrate. The electrode is also made in electrical conduction with the second semiconductor region forming a periphery section. Thus, it is possible to obtain a breakdown voltage nearly equal to that of a planar junction.
As explained above, in a super junction semiconductor device, for improving a breakdown voltage, a periphery section to become a voltage withstanding structure is provided on the outside of an active section having an alternating conductivity type layer. The periphery section becomes an inactive region when the device is in an on-state. For miniaturizing a semiconductor chip having the super junction semiconductor, a length from the boundary between the active section and the periphery section to the end of the periphery section, that is, a length to the edge of the semiconductor chip is preferably the shortest possible. In the device disclosed in the above JP-A-2002-280555, however, the main object is to reduce a leak current in an off-state and therefore no consideration is given to shortening the length of the periphery section. Also in the device disclosed in the above JP-A-2002-184985 with the main object thereof being to make the device provide a high breakdown voltage, no consideration is given to shortening the length of the periphery section.
In view of the foregoing, it would be desirable to provide a semiconductor device having a alternating conductivity type layer, provided with a high breakdown voltage, and having an periphery section with a short length to be a voltage withstanding structure.